Abstract: This letter presents a 32-GS/s per-way hierarchical sampling front-end (SFE) for time-interleaved ADCs, featuring both high linearity and energy efficiency with inherent embedded gain from ...
Abstract: In this paper, a bidirectional RF front-end based on the WIN Semiconductor’s 100 nm GaAs pHEMT process that can support the extension of E-band vector network analyzers (VNA) is proposed.
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