EDN

Altera unveils Quartus II software version 8.1

The folks at Altera have unveiled their Quartus II software version 8.1 for CPLD, FPGA, and HardCopy ASIC designs. Based on internal benchmarks, the folks at Altera claim high-density FPGA compile ...
EDN

Altera Quartus II Software Version 12.1 Accelerates System Development with Enhanced High-Level Design Flows

The high-level design tools Altera offers include system-level C-based, IP-based and model-based design entry systems. These tools support and simplify the development of today's advanced programmable ...
Design-Reuse

Quartus II Software Version 9.0 Delivers Productivity Leadership for Altera's Portfolio of Transceiver FPGAs and HardCopy ASICs

New SSN Analyzer Tool—Provides designer feedback on potential simultaneous switching noise (SSN) violations during pin assignments, enabling faster board design and improving signal integrity.
Design-Reuse

Altera Ships Quartus II Design Software for New Stratix II Family to 20,000 Customers

Stratix II Offers Designers Over 65 Percent More Density than Competitive Products San Jose, Calif., February 9, 2003—Altera Corporation (NASDAQ: ALTR) today announced that it has commenced ...