If you would like to learn more about the IAEA’s work, sign up for our weekly updates containing our most important news, multimedia and more. The IAEA is calling on interested research institutes to ...
Techniques that reduce the difficulty and cost associated with testing an integrated circuit. This can result in a decrease in the time spent on a tester, a decrease in cost associated with generating ...
Integrated circuit (IC) sizes continue to grow as they meet the compute requirements of cutting-edge applications such as artificial intelligence (AI), autonomous driving, and data centers. As design ...
Memory test at-speed isn't easy but can be achieved by balancing test selection, area overhead, and test-time constraints. The semiconductor industry has intensified its focus on yield issues to meet ...
Connected devices and systems have become an integral part of our everyday life and we take this for granted. Finding the fastest way to our destination with a smartphone, reading the news on a tablet ...
Handling timing exception paths in ATPG tools while creating at-speed patterns has always been a tough and tricky task. It is well understood that at-speed testing is a requirement for modern ...
Designing circuit boards for high speed applications requires special considerations. This you already know, but what exactly do you need to do differently from common board layout? Building on where ...
Coordinated contractor testing can help accelerate the acquisition process and improve the quality of equipment and programs. Test and evaluation (T&E) is a perennial target of criticism for the time ...
The IDDQ test relies on measuring the supply current (I DD) of an IC’s quiescent state, when the circuit isn’t switching and inputs are held at static values. Test patterns are used to place the ...