MarketWatch

Imec mitigates thermal bottleneck in 3D HBM-on-GPU architectures using a system-technology co-optimization approach

-- Imec presents the first comprehensive thermal study of 3D HBM-on-GPU integration using a system-technology co-optimization (STCO) approach. -- The study allows to identify and mitigate thermal ...
Semiconductor Engineering

Chiplets: Bridging The Gap Between The System Requirements And Design Aggregation, Planning, And Optimization

A technical paper titled “System and Design Technology Co-optimization of Chiplet-based AI Accelerator with Machine Learning” was published by researchers at Auburn University. “With the availability ...
T&D

Minimize Total System Costs with Co-Optimization

Co-optimizing generation and transmission in a single model endogenously identifies the least-cost mix of grid enablement and generation resources. Over a 15 to 20-year horizon, where compounding ...
Nasdaq

Ansys Strengthens Collaboration with TSMC on Advanced Node Processes Certification and 3D-IC Multiphysics Design Solutions

AI-based workflows aid advanced node designs, ensuring design and system technology co-optimization for HPC and AI applications / Key Highlights TSMC and Ansys advance AI-assisted workflows to support ...
Semiconductor Engineering

IEDM Keynote: Ann Kelleher On Future Technology

IEDM 2022 celebrated 75 Years of the Transistor. I can’t imagine anything else invented in the last 75 years has had as much effect on my life, and probably yours, too. After the awards session, the ...
Missoulian

Imec mitigates thermal bottleneck in 3D HBM-on-GPU architectures using a system-technology co-optimization approach

Holistic system-technology co-optimization (STCO) approach key in reducing peak GPU and HBM temperatures under AI workloads while enhancing performance density of future GPU-based architectures ...