The era of universal processor architectures is giving way to workload-specific designs optimized for performance, power, and scalability. As data-centric applications in artificial intelligence (AI), ...

This webinar by SiFive, a developer of RISC-V cores, introduces the RISC-V Architecture. It will provide an overview of RISC-V Modes, Instructions and Extensions, Control and Status Registers, and ...

If you wanted to make a CPU, and you’re not AMD or Intel, there are two real choices: ARM and RISC-V. But what are the differences between the two, and why do companies choose one over the other?

The company appears well positioned to challenge CPU incumbents with high performance RISC-V CPUs and Vector Extensions to the open ISA architecture. The RISC-V CPU Instruction Set Architecture (ISA) ...

Forbes contributors publish independent expert analyses and insights. Dave Altavilla is a Tech Analyst covering chips, compute and AI. For decades, chip architectures have been dominated by a pair of ...

For those not immediately familiar with RISC-V, it is a relatively new CPU architecture which takes advantage of Reduced Instruction Set Computer (RISC) principles. RISC-V is an open standard ...

A new RISC-V Tensor Unit, based on fully customizable 64-bit cores, claims to provide a huge performance boost for artificial intelligence (AI) applications compared to just running software on scalar ...

Adoption of RISC-V processors is accelerating. This technology, like everything, comes with benefits and risks. The open standard means freedom for many developers, but success depends on the ...

RISC-V, pronounced “risk five,” is a modern open-source instruction set architecture (ISA) based on reduced instruction set computer (RISC) principles. In simple terms, it’s like a blueprint that ...

The 2024 RISC-V Summit North America marked a significant milestone for the RISC-V community with the ratification of the RVA23 Profile. This event signifies a major step forward in the evolution of ...