Microchip is aiming at ISO 26262 or IEC 61508 compliance with a functional safety variant of its 8bit AVR family that has two cores operating in lock-step. Called AVR SD, the devices have 32 or ...

Arm's new Cortex-R5 (Fig. 1) and Cortex-R7 (Fig. 2) are ready for 40nm. These two architectures extend the real time Cortex-R4 architecture released a couple years ago. These higher end multicore ...

Hsinchu, Taiwan – Andes Technology, a leading supplier of high-efficiency, low-power 32/64-bit RISC-V processor cores, today announced the launch of its new D23-SE core, a compact and secure processor ...

Last month, Intel unleashed its highly anticipated Ivy Bridge microarchitecture. We had been hearing about Ivy Bridge for what seemed like an eternity leading up to the launch, and although not based ...