EDN

An Effective Standard: The Unified Power Format

Technical standards are pervasive. When they’re effective, they enable innovation, increase quality, and reduce costs. Over the past five years, I’ve been involved in a technical standardization ...
Design-Reuse

A need for static and dynamic Low Power Verification

With increasing complexities in power architecture and complex power domain partitioning, it is becoming imperative to drive functional and physical verification of these complex power logic hand in ...
Semiconductor Engineering

Libraries: Standardization and Requirements For Power-Aware Dynamic Simulation

Libraries play a crucial role in the entire design verification and implementation flow (DVIF). Specifically for PA design verification and implementation, special design attributes are mandatory in ...
Semiconductor Engineering

Overcoming Low Power Verification Challenges For Mixed-Signal SoC Designs

Isolation, retention, and power switches are the important functionalities of power-aware designs which use the common low power techniques like power shutoff, multi-voltage, and advanced techniques ...
T&D

Dynamic Data, Technology Drives Grid Improvements at Alabama Power

With 116 years of experience providing affordable, reliable electricity, Alabama Power, a unit of Southern Co., has a history of leveraging technology to improve its operations. Since the 1980s, the ...
Electronic Design

Dynamic Power Control Cuts Dissipation of Quad 16-bit DAC

A four-channel, 16-bit DAC has innovative dynamic power control that automatically reduces the IC's power dissipation if the load power tends to exceed its specified amount. Find a downloadable ...
EDN

Low power implementation techniques for ASIC physical design

In the semiconductor domain, the operating frequency of devices and the number of transistors in a single module increase over time. In this article, we will look at widely known low power ...