Lattice Semiconductor today announced the immediate availability of the PCI Express Root Complex (RC) Lite solution based on the LatticeECP3 and LatticeECP2M FPGA families for use in simple bridging ...

ASIC Architect brings industry standard solution for PCI Express. Santa Clara, CA, July 29, 2005-- ASIC Architect, Inc., a leading provider of Cores and Solutions for PCI Express, today announced that ...

This application note demonstrates several key features of the Vivado Design Suite and the IP cores used in the design. The key features that are illustrated by this design include: Each of these ...

Easier access to 66-Hz, 8- to 32-bit local bus systems is possible with PLX Technologies' PEX 8311 x1-lane PCI Express-to-local bus bridge. It includes root complex and end-point support. The ...

In addition to accommodating longer data-transmission distances, the XIO2000 PCI Express-to-PCI bridge promotes seamless interfacing of legacy PCI devices to the PCI Express bus. The device provides a ...

There were reports circulating that the upcoming Intel core i7 Haswell-E HEDT processors would feature more PCI-E express lanes, but it looks like the opposite is true. It was hoped that the chip ...

PCI Express, the next generation of the PCI bus, is being widely adopted in today’s high-performance PCs, servers and embedded applications. This high bandwidth protocol keeps the same software ...

With a three year cadence between PCI-Express bandwidth increases and a three year span between when a gear shift is first talked about and when its chippery is first put into the field, it is ...