I have been asked to be co-chair at DVCon for a tutorial on Mixed-Signal verification (yes, what a surprise :)) in collaboration with Martin Barnasconi, from NXP. We therefore used the best of our ...
DVCon Europe, a new conference and exhibition around design and verification, will be held Oct. 14-15 in Munich, Germany. Call for abstracts for DVCon Europe is open through April 8. The obvious ...
The concept of silicon realization, as defined in the Cadence EDA360 vision paper, represents everything required to produce a system-on-a-chip (SoC) design in silicon. 1 Silicon realization addresses ...
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