There's been a shift in what's needed in modeling standards for IC design. The focus has moved from timing to power consumption. Timing modeling, which dominated much of the effort from the early to ...

The continuing advancements in semiconductor technology have led to production flows for 130nm, 90nm and below, enabling 40 million-plus gate chips to be reliably manufactured. This article explores ...

Power, heat, and their combined effects on aging and reliability, are becoming increasingly critical variables in the design of chips that will be used across a variety of new and existing markets. As ...

This paper presents a digital design flow in order to design high performance differential Emitter Coupled Logic (ECL) circuits efficiently. The proposed flow is similar to the ordinary digital CMOS ...

Analyzing and managing power at the system level is becoming more difficult and more important—and slow to catch on. There are several reasons for this. First, design automation tools have lagged ...