Altium has expanded support for system-level FPGA and CPLD development by adding a JTAG interface to its Nexar system. The addition of the JTAG port enables engineers to use their FPGA-development ...

Over on the University of Reddit there’s a course for learning all about FPGAs and CPLDs. It’s just an introduction to digital logic, but with a teacher capable of building a CPLD motor control board ...

In its third major and field-programmable gate array (FPGA) announcement in the last 12 months, Lattice Semiconductor Corp. has introduced MachXO, a new product family that combines the key features ...

Applications traditionally supported by high-density complex programmable-logic devices (CPLDs) and low-capacity FPGAs now have another option—the MachXO series of logic devices. Developed by Lattice ...

Adding to the CoolRunner-II CPLD family, the XC2C32A and XC2C64A debut in smaller MLF packages than their predecessors and integrate an additional I/O bank to support voltage level translation and ...

[Kodera2t] wanted to experiment with programmable logic. Instead of going with an FPGA board, he decided to build his own CPLD (complex programmable logic device) board, with a built-in programmer.

San Jose, Calif., December 6, 2004 — Altera Corporation (NASDAQ: ALTR) today announced it is shipping version 4.2 of its Quartus® II design software, delivering the world’s highest performance for ...

If the 90's were the age of the ASIC then today is the age of the FPGA. ASIC designs re-created in today's FPGA technology is not a flight of fancy but a real concept ...