Design-Reuse

Powerful FPGA Design Creation and Simulation IDE Adds VHDL-2019 Support & OSVVM Enhancements

Aldec’s Active-HDL™ enables FPGA designers to take full advantage of the many features within the latest revision to VHDL and helps improve design verification efficiency. Henderson, NV – January 20, ...
Elektor Magazine

Watch EEI #56: Mastering FPGA Chip Design with Kevin Hubbard

Learn real-world strategies about FPGA Chip Design, Join Elektor Engineering Insights on Sept 24 at 16:00 CEST with Kevin ...
Elektor Magazine

Mastering FPGA Chip Design with Kevin Hubbard, Elektor Engineering Insights #56

Learn real-world strategies about FPGA Chip Design, Join Elektor Engineering Insights on Sept 24 at 16:00 CEST with Kevin ...
Semiconductor Engineering

FPGA VHDL Verification

This is actually possible – and with an average efficiency improvement of 20% to 50% for medium to high complexity FPGAs. Less for data path oriented designs and more for control or protocol oriented ...
Design-Reuse

Automatic C-to-VHDL testbench generation shortens FPGA development time

Verifying behavior early and often has become critical with FPGAs. Newer generations of FPGAs have gate counts that rival the largest custom ASICs of five years ago. This fact, coupled with the broad ...
Hackaday

FPGA Snake Game Uses No VHDL At All

We’re really not supposed to start a feature like this; but this hack is awesome. It’s a game of Snake implemented by an FPGA dev board. It uses a 16×16 LED matrix as the display and an SNES ...
Hackaday

Learn FPGA Fast With Hackaday’s FPGA Boot Camp

FPGAs have gone from being a niche product for people with big budgets to something that every electronics experimenter ought to have in their toolbox. I am always surprised at how many people I meet ...
EDN

Ylichron Srl launches the HCE, a true C to VHDL compiler, for the FPGA world

Ylichron S.r.l. is an ENEA (the Italian Agency for New Technologies, Energy and Environment) spin-off company. During the Many-core Reconfigurable Supercomputing Conference held in Belfast (April ...
Linux Journal

FPGA Programming with Linux

Free software licenses and operating systems like GNU/Linux make it possible to learn programming and customize state-of-the-art software in countless ways. Hacking software, however, isn't the last ...
EDN

Compute a histogram in an FPGA with one clock

Histograms are often useful tools for analyzing digital data. To get reliable results from a histogram, though, you must collect large amounts of data, often with 100,000 to 1 million points. If you ...