Dresden, Germany—ZMD AG has developed a 16-bit sensor signal conditioning IC (SSC) for resistive bridge sensors. Dubbed the ZSSC3017, this device combines high accuracy amplification, 16-bit precision ...
A DSP-coprocessor module for ARM7 µP cores, Piccolo adds a 32-bit DSP instruction set and uses the ARM coprocessor interface for communicating with the ARM processor core. The µP and the Piccolo DSP ...
SAN JOSE, Calif.--(BUSINESS WIRE)--Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced the Cadence ® Tensilica ® ConnX B20 DSP IP, the highest-performing DSP in the popular ConnX family. Based ...
SANTA CLARA, Calif. - November 2, 2009 - Tensilica, Inc. today introduced the Xtensa LX3 high-performance dataplane processor (DPU) core optimized for digital signal processing (DSP) and control in ...
Five very long instruction word (VLIW)-slot architecture capable of issuing two 128-bit loads per cycle 2X MAC capability versus HiFi 4 DSP for pre- and post-processing, includes: Support for eight ...
SANTA CLARA, Calif. - August 24, 2009 - Tensilica, Inc. today introduced the high-performance, small, low-power ConnX D2 16-bit dual-MAC (Multiply Accumulator) DSP (Digital Signal Processor) engine ...
A DSP design approach, including hardware and software implementation for a quasi-absolute encoder. LEE WEI YAN, Applications Engineer, Avago Technologies, San Jose, Calif. A high-accuracy 20-bit ...
Ten years ago this week, AMD launched the first consumer x86 64-bit processors, the Athlon 64 FX-51 and Athlon 64 3200+. It remains one of the most exciting products that I ever covered -- the ...
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