The RISC-V Summit North America, held on 22-23 October 2025 in Santa Clara, California, showcased the latest CPU cores featuring new vector processors, high-speed interfaces, and peripheral subsystems ...

SAN JOSE, Calif., April 22, 2025 /PRNewswire/ -- S2C, a global leader in FPGA-based prototyping solutions, and Andes Technology, a premier provider of high-performance, low-power RISC-V processor IP ...

Have you ever wondered if there’s a way to break free from the dominance of proprietary computing architectures like x86 and ARM? For decades, these platforms have dictated the rules of the game, ...

RISC-V architecture is gaining traction in China as a geopolitically neutral alternative to x86 and ARM architectures dominated by the U.S. The rise of RISC-V presents a potential risk to Advanced ...

With the rise of RISC-V architecture, developers are seeking efficient and flexible solutions for their processor needs. MIPS RISC-V IP Core Technology is at the forefront of this revolution, offering ...

The adoption of RISC-V with open standards in automotive applications continues to accelerate, leveraging its flexibility and scalability, particularly benefiting the automotive industry’s shift to ...

ECARX launched its RISC-V-based EXP01 processor and outlined its automotive-grade MCU roadmap at the RISC-V Summit Europe 2025. ECARX Holdings Inc., a global mobility tech provider, introduced its ...

RISC-V architecture is an open, international standard governing how software interfaces with hardware in a computer. It serves as a shared language that sets the parameters for communication and ...